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| author | Guodong Xu <guodong@riscstar.com> | 2026-01-10 13:18:20 +0800 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2026-01-13 22:22:56 +0000 |
| commit | c712413333f8e19cc3de4e9cd1a3ed8a53169cc9 (patch) | |
| tree | f96f274e8a7539455783173c4d3ad6e51a698528 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | b321256a4f36227e0c1ae54e8c6c48524dcba83d (diff) | |
dt-bindings: riscv: Add Ssccptr, Sscounterenw, Sstvala, Sstvecd, Ssu64xl
Add descriptions for five new extensions: Ssccptr, Sscounterenw, Sstvala,
Sstvecd, and Ssu64xl. These extensions are ratified in RISC-V Profiles
Version 1.0 (commit b1d806605f87 "Updated to ratified state.").
They are introduced as new extension names for existing features and
regulate implementation details for RISC-V Profile compliance. According
to RISC-V Profiles Version 1.0 and RVA23 Profiles Version 1.0, their
requirement status are:
- Ssccptr: Mandatory in RVA20S64, RVA22S64, RVA23S64
- Sscounterenw: Mandatory in RVA22S64, RVA23S64
- Sstvala: Mandatory in RVA20S64, RVA22S64, RVA23S64
- Sstvecd: Mandatory in RVA20S64, RVA22S64, RVA23S64
- Ssu64xl: Optional in RVA20S64, RVA22S64; Mandatory in RVA23S64
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions