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| author | Bibo Mao <maobibo@loongson.cn> | 2026-02-06 09:27:46 +0800 |
|---|---|---|
| committer | Huacai Chen <chenhuacai@loongson.cn> | 2026-02-06 09:27:46 +0800 |
| commit | c5cb12b81a0bddbff0f963662f18747b6d633592 (patch) | |
| tree | 513ccf1113859b05c86a30448ef55c67e1115ba7 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | c2f94dafe197961f266fef8946d39df66a9750f4 (diff) | |
LoongArch: KVM: Handle LOONGARCH_CSR_IPR during vCPU context switch
Register LOONGARCH_CSR_IPR is interrupt priority setting for nested
interrupt handling. Though LoongArch Linux AVEC driver does not use
this register, KVM hypervisor needs to save and restore this it during
vCPU context switch. Because Linux AVEC driver may use this register
in future, or other OS may use it.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions