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| author | Venkata Ramana Nayana <venkata.ramana.nayana@intel.com> | 2025-11-07 14:01:41 +0530 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2025-11-14 15:57:36 -0800 |
| commit | c34a14bce7090862ebe5a64abe8d85df75e62737 (patch) | |
| tree | 530040b79a99ca6a5ff2e6729e303eba680aebe3 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | 78ff838a8ab78b3cd438e382ff5204b93db3237e (diff) | |
drm/xe/irq: Handle msix vector0 interrupt
Current gu2host handler registered as MSI-X vector 0 and as per bspec for
a msix vector 0 interrupt, the driver must check the legacy registers
190008(TILE_INT_REG), 190060h (GT INTR Identity Reg 0) and other registers
mentioned in "Interrupt Service Routine Pseudocode" otherwise it will block
the next interrupts. To overcome this issue replacing guc2host handler
with legacy xe_irq_handler.
Fixes: da889070be7b2 ("drm/xe/irq: Separate MSI and MSI-X flows")
Bspec: 62357
Signed-off-by: Venkata Ramana Nayana <venkata.ramana.nayana@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Link: https://patch.msgid.link/20251107083141.2080189-1-venkata.ramana.nayana@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions