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| author | Brian Nguyen <brian3.nguyen@intel.com> | 2025-12-13 05:32:28 +0800 |
|---|---|---|
| committer | Matthew Brost <matthew.brost@intel.com> | 2025-12-12 16:59:09 -0800 |
| commit | b4abe06d6d82df6521f449357ca6b7c6ce9c0903 (patch) | |
| tree | 4ea6cf67b2ea61d70cd5d0e0a6db34970b4b6094 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | 44ece22518594ec9ffd9ab8c4c500b522278289e (diff) | |
drm/xe/xe_tlb_inval: Modify fence interface to support PPC flush
Allow tlb_invalidation to control when driver wants to flush the
Private Physical Cache (PPC) as a process of the tlb invalidation
process.
Default behavior is still to always flush the PPC but driver now has the
option to disable it.
v2:
- Revise commit/kernel doc descriptions. (Shuicheng)
- Remove unused function. (Shuicheng)
- Remove bool flush_cache parameter from fence,
and various function inputs. (Matthew B)
Signed-off-by: Brian Nguyen <brian3.nguyen@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Shuicheng Lin <shuicheng.lin@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/20251212213225.3564537-14-brian3.nguyen@intel.com
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions