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authorDan Carpenter <dan.carpenter@linaro.org>2026-01-30 16:19:41 +0300
committerJakub Kicinski <kuba@kernel.org>2026-02-04 18:17:28 -0800
commitb0eeeb1b70c0b2e1118fec7c28ffb0e21fe98688 (patch)
tree8558d13e7b5a4c9d794243e3840f399764817808 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git
parentf70f835fbd84921b096ac9d3c060f23f4fa1f395 (diff)
net: stmmac: s32: use a syscon for S32_PHY_INTF_SEL_RGMII
On the s32 chipsets the GMAC_0_CTRL_STS register is in GPR region. Originally, accessing this register was done in a sort of ad-hoc way, but we want to use the syscon interface to do it. This is a little bit ugly because we have to maintain backwards compatibility to the old device trees so we have to support both ways to access this register. Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com> Link: https://patch.msgid.link/b6b60d03344d070b2b4db7f0f00527f166e594e0.1769764941.git.dan.carpenter@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
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