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| author | Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> | 2025-12-29 21:47:41 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-01-21 13:15:50 -0600 |
| commit | 78c13dac18cf0e6f6cbc6ea85d4f967e6cca9562 (patch) | |
| tree | 3ecdd67a3e9565961174ac5f9e4153d46ad74de2 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | 0fdcc948929a6d673bd0f90631dd6e42090c3dbd (diff) | |
arm64: dts: qcom: sm6115: Add CX_MEM/DBGC GPU regions
Describe the GPU register regions, with the former existing but not
being used much if at all on this silicon, and the latter containing
various debugging levers generally related to dumping the state of
the IP upon a crash.
Fixes: 11750af256f8 ("arm64: dts: qcom: sm6115: Add GPU nodes")
Reported-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Closes: https://lore.kernel.org/linux-arm-msm/8a64f70b-8034-45e7-86a3-0015cf357132@oss.qualcomm.com/T/#m404f1425c36b61467760f058b696b8910340a063
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251229-topic-6115_2290_gpu_dbgc-v1-3-4a24d196389c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions