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| author | Chris Brandt <chris.brandt@renesas.com> | 2025-11-24 08:10:02 -0500 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-01-16 10:42:33 +0100 |
| commit | 5a4326f2e3b1edfb3329c1bee59035dc9f048b59 (patch) | |
| tree | bfc6b3847d4121c9d551c94d7c115bdf89bbafad /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | 879e9fc8f689cbd890f2f79b9da098697746316d (diff) | |
clk: renesas: rzg2l: Remove DSI clock rate restrictions
Convert the limited MIPI clock calculations to a full range of settings
based on math including H/W limitation validation.
Since the required DSI division setting must be specified from external
sources before calculations, expose a new API to set it.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Tested-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251124131003.992554-2-chris.brandt@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions