diff options
| author | Qiang Yu <qiang.yu@oss.qualcomm.com> | 2025-11-24 02:24:35 -0800 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2025-12-23 23:11:03 +0530 |
| commit | 5359da47e066edb3fcd36c7349726913ee8628f2 (patch) | |
| tree | 3a047bbed17589f6a39569a62844ad4d98b9da60 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | 4968df19d5dcb22fa2b797b64eb3c2880a239e12 (diff) | |
phy: qcom-qmp: qserdes-txrx: Add complete QMP PCIe PHY v8 register offsets
Kaanapali SoC uses QMP PHY with version v8 for PCIe Gen3 x2, but requires
a completely unique qserdes-txrx register offsets compared to existing v8
offsets.
Hence, add a dedicated header file containing the FULL SET of qserdes-txrx
register definitions required for Kaanapali's PCIe PHY operation.
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
Link: https://patch.msgid.link/20251124-kaanapali-pcie-phy-v4-2-d04ee9cca83b@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions