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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2025-12-24 16:50:47 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-01-09 11:26:23 +0100 |
| commit | 535677e920f09c6e478e671e4527ff9af6ffc6c7 (patch) | |
| tree | 0c3a0a1ac7cebc38b3a50664d6302c30ca2fb246 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | c07dd5ac0e2834bffc70409401e3bccac8abbbb4 (diff) | |
clk: renesas: r9a09g077: Add CANFD clocks
The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have a CANFD
peripheral which has three input clocks PCLKM (peripheral clock),
PCLKH (RAM clock) and PCLKCAN (CANFD clock).
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251224165049.3384870-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions