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authorVladimir Oltean <vladimir.oltean@nxp.com>2025-11-25 13:48:42 +0200
committerVinod Koul <vkoul@kernel.org>2025-12-23 23:11:06 +0530
commit444bb9a7b3ef07ecb96ca7ae30a6c9daaf865de8 (patch)
tree65d8cc9de9418f615e3eaaf5ff5bc6bf77bafd00 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git
parent6af3b6d365579a0b62d24e687f6d55d17f118172 (diff)
phy: lynx-28g: make lynx_28g_set_lane_mode() more systematic
The current approach of transitioning from one SerDes protocol to another in lynx_28g_set_lane_mode() is too poetic. Because the driver only supports 1GbE and 10GbE, it only modifies those registers which it knows are different between these two modes. However, that is hardly extensible for 25GbE, 40GbE, backplane modes, etc. We need something more systematic to make sure that all lane and protocol converter registers are written to consistent values, no matter what was the source lane mode. For that, we need to introduce tables with register field values, for each supported lane mode. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-11-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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