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| author | Philip Yang <Philip.Yang@amd.com> | 2026-01-27 13:52:33 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-02-05 17:23:51 -0500 |
| commit | 3b948dd0366a0b64c02e4ed1aefdf7825942e803 (patch) | |
| tree | 1e752441b85f612c068ce963f2590fa354a601fe /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | ff205dc95a897b4b8c093b665702e83bffd04dc9 (diff) | |
drm/amdgpu: Use 5-level paging if gmc support 57-bit VA
Regardless if CPU enable 5-level paging, GPU vm use 5-level paging if
gmc init with 57-bit address space support, because
ARM64 4-level paging support 48-bit VA, x86 and GPU 4-level paging
support 47-bit VA, require 5-level paging on GPU to support ARM64.
NPA address space 52-bit mapping on NPA GPU VM require 5-level paging.
Debugger trap get device snapshot expect LDS and Scratch base, limit
above 57-bit, which is set only for 5-level paging.
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.19.x
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions