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authorDaniel Golle <daniel@makrotopia.org>2026-01-22 16:39:09 +0000
committerPaolo Abeni <pabeni@redhat.com>2026-01-27 11:52:44 +0100
commit338375118514f28f15a23046578d15fd8ba4c199 (patch)
tree02b5103379a34d673be3749729ee1add21826233 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git
parente7e354aa496b1ba33cf72e93ff10bf585705d15a (diff)
net: dsa: lantiq: allow arbitrary MII registers
The Lantiq GSWIP and MaxLinear GSW1xx drivers are currently relying on a hard-coded mapping of MII ports to their respective MII_CFG and MII_PCDU registers and only allow applying an offset to the port index. While this is sufficient for the currently supported hardware, the very similar Intel GSW150 (aka. Lantiq PEB7084) cannot be described using this arrangement. Introduce two arrays to specify the MII_CFG and MII_PCDU registers for each port, replacing the current bitmap used to safeguard MII ports as well as the port index offset. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://patch.msgid.link/63fc01195196384f5e244a0ce9ec2ae3a6c08fe3.1769099517.git.daniel@makrotopia.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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