diff options
| author | David Lechner <dlechner@baylibre.com> | 2026-01-23 14:37:29 -0600 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-02-02 12:12:46 +0000 |
| commit | 2e706f86a5aa94702694774efb7d8b151c6d724f (patch) | |
| tree | 9a952bd3fecc4c46aff882c1ebd7a13901b4c4b8 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | 05c3bd745bb065223201824f0044455558541bdc (diff) | |
spi: dt-bindings: adi,axi-spi-engine: add multi-lane support
Extend the ADI AXI SPI engine binding for multiple data lanes. This SPI
controller has a capability to read multiple data words at the same
time (e.g. for use with simultaneous sampling ADCs). The current FPGA
implementation can support up to 8 data lanes at a time (depending on a
compile-time configuration option).
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Link: https://patch.msgid.link/20260123-spi-add-multi-bus-support-v6-6-12af183c06eb@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions