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| author | Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> | 2025-12-01 13:29:31 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2025-12-15 22:44:32 +0100 |
| commit | 13e7b3305b647cf58c47c979fe8a04e08caa6098 (patch) | |
| tree | 97e0c3dce783183d0a950e303af72143af124e20 /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | a6568d82091d279c8fbcdb1d30b46c23756b9145 (diff) | |
irqchip: Add RZ/{T2H,N2H} Interrupt Controller (ICU) driver
The Renesas RZ/T2H (R9A09G077) and Renesas RZ/N2H (R9A09G087) SoCs have an
Interrupt Controller (ICU) that supports interrupts from external pins IRQ0
to IRQ15, and SEI, and software-triggered interrupts INTCPU0 to INTCPU15.
INTCPU0 to INTCPU13, IRQ0 to IRQ13 are non-safety interrupts, while
INTCPU14, INTCPU15, IRQ14, IRQ15 and SEI are safety interrupts, and are
exposed via a separate register space.
Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/20251201112933.488801-3-cosmin-gabriel.tanislav.xa@renesas.com
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions