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| author | Jingyi Wang <quic_jingyw@quicinc.com> | 2024-12-03 17:27:14 +0800 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-12-03 13:20:19 -0600 |
| commit | 7be190e4bdd2bd1aca84afef06bb755c06a85473 (patch) | |
| tree | 8cf1977ffc4cfe1d7eb96c75b2151e1b7c6e488d /tools/lib/python | |
| parent | d511280ce9cc5920442e78a589946f63c247dd3b (diff) | |
arm64: dts: qcom: add QCS8300 platform
Add initial DTSI for QCS8300 SoC.
Features added in this revision:
- CPUs with PSCI idle states
- Interrupt-controller with PDC wakeup support
- Timers, TCSR Clock Controllers
- Reserved Shared memory
- GCC and RPMHCC
- TLMM
- Interconnect
- QuP with uart
- SMMU
- QFPROM
- Rpmhpd power controller
- UFS
- Inter-Processor Communication Controller
- SRAM
- Remoteprocs including ADSP,CDSP and GPDSP
- BWMONs
Written with help from Zhenhua Huang(added the smmu node), Xin Liu(added
ufs, adsp and gpdsp nodes), Tingguo Cheng(added the rpmhpd node), Kyle
Deng(added the aoss_qmp node), Raviteja Laggyshetty(added interconnect
nodes) and Cong Zhang(added the INTID of EL2 non-secure physical timer).
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/r/20241203-qcs8300_initial_dtsi-v4-3-d7c953484024@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/lib/python')
0 files changed, 0 insertions, 0 deletions