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| author | Bjorn Helgaas <bhelgaas@google.com> | 2026-04-13 12:50:07 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2026-04-13 12:50:07 -0500 |
| commit | 736b677ff42837accf40784d5bd71a1d01f8fc87 (patch) | |
| tree | c5fcb2656fc3388d6579aa8e60760bc6aa5c4e67 /tools/lib/python | |
| parent | 8153aaf6b9e798a89d5939cf55f44a1815fe3252 (diff) | |
| parent | c8b610341914cb62899e31b41f724b5c4831a645 (diff) | |
Merge branch 'pci/controller/max-link-speed'
- Add pcie_get_link_speed() to encapsulate and bounds-check
pcie_link_speed[] accesses (Hans Zhang)
- Validate max-link-speed from DT in j721e, brcmstb, mediatek-gen3, rzg3s
(where the actual controller constraints are known), and remove it from
the generic OF DT accessor (Hans Zhang)
* pci/controller/max-link-speed:
PCI: of: Remove max-link-speed generation validation
PCI: controller: Validate max-link-speed
PCI: j721e: Validate max-link-speed from DT
PCI: dwc: Use pcie_get_link_speed() helper for safe array access
PCI: Add pcie_get_link_speed() helper for safe array access
Diffstat (limited to 'tools/lib/python')
0 files changed, 0 insertions, 0 deletions