diff options
| author | Manikanta Maddireddy <mmaddireddy@nvidia.com> | 2026-03-24 13:38:56 +0530 |
|---|---|---|
| committer | Manivannan Sadhasivam <mani@kernel.org> | 2026-04-04 16:16:49 +0530 |
| commit | 12a22fb38cbba1991a3f174912b343cdb6afa186 (patch) | |
| tree | 47eea6980800df060f320292ea6743205d61046d /tools/lib/python | |
| parent | 5aec1f18b326ddc455ae9d9d0f5394efc20eee9b (diff) | |
PCI: tegra194: Expose BAR2 (MSI-X) and BAR4 (DMA) as 64-bit BAR_RESERVED
Tegra Endpoint exposes three 64-bit BARs at indices 0, 2, and 4:
- BAR0+BAR1: EPF test/data (programmable 64-bit BAR)
- BAR2+BAR3: MSI-X table (hardware-backed)
- BAR4+BAR5: DMA registers (hardware-backed)
Update tegra_pcie_epc_features so that BAR2 is BAR_RESERVED with
PCI_EPC_BAR_RSVD_MSIX_TBL_RAM (64 KB) & PCI_EPC_BAR_RSVD_MSIX_PBA_RAM
(64 KB) and BAR4 is BAR_RESERVED with PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO (4KB).
This keeps CONSECUTIVE_BAR_TEST working while allowing the host to use
64-bit BAR2 (MSI-X) and BAR4 (DMA).
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
Link: https://patch.msgid.link/20260324080857.916263-4-mmaddireddy@nvidia.com
Diffstat (limited to 'tools/lib/python')
0 files changed, 0 insertions, 0 deletions