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| author | Ammar Mustafa <ammarmustafa34@gmail.com> | 2026-02-27 14:08:33 -0500 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2026-03-27 07:31:19 +0000 |
| commit | d2a4ec19d2a2e54c23b5180e939994d3da4a6b91 (patch) | |
| tree | fafd605ff6cbc4d436abc97d996c68f31d9253ec /tools/lib/python/kdoc/python_version.py | |
| parent | d185324efadc1e75acc6be2e4351ecfe8957b3a7 (diff) | |
Docs: iio: ad7191 Correct clock configuration
Correct the ad7191 documentation to match the datasheet:
- Fix inverted CLKSEL pin logic: device uses external clock when pin is
inactive, and internal CMOS/crystal when high.
- Correct CMOS-compatible clock pin from MCLK2 to MCLK1.
Signed-off-by: Ammar Mustafa <ammarmustafa34@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'tools/lib/python/kdoc/python_version.py')
0 files changed, 0 insertions, 0 deletions