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authorAniket Randive <aniket.randive@oss.qualcomm.com>2026-04-10 15:49:49 +0530
committerAndi Shyti <andi.shyti@kernel.org>2026-04-10 22:27:10 +0200
commit656147fb1d4ce047a3889d1b9539cdec0327cc16 (patch)
treebfe7809253c1f87da661ab6124f6005cb71608eb /scripts
parent6ecea2083d61f2b440477693b8b024df00dccbb4 (diff)
i2c: qcom-geni: Avoid extra TX DMA TRE for single read message in GPI mode
In GPI mode, the I2C GENI driver programs an extra TX DMA transfer descriptor (TRE) on the TX channel when handling a single read message. This results in an unintended write phase being issued on the I2C bus, even though a read transaction does not require any TX data. For a single-byte read, the correct hardware sequence consists of the CONFIG and GO commands followed by a single RX DMA TRE. Programming an additional TX DMA TRE is redundant, causes unnecessary DMA buffer mapping on the TX channel, and may lead to incorrect bus behavior. Update the transfer logic to avoid programming a TX DMA TRE for single read messages in GPI mode. Co-developed-by: Maramaina Naresh <naresh.maramaina@oss.qualcomm.com> Signed-off-by: Maramaina Naresh <naresh.maramaina@oss.qualcomm.com> Signed-off-by: Aniket Randive <aniket.randive@oss.qualcomm.com> Reviewed-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260410101949.2315058-1-aniket.randive@oss.qualcomm.com
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