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authorMukesh Ojha <mukesh.ojha@oss.qualcomm.com>2026-03-27 22:42:40 +0530
committerLinus Walleij <linusw@kernel.org>2026-03-30 10:29:59 +0200
commit0720208b37ae4f1193dc7103ee269b180a8f8943 (patch)
treecb64455f3f26fcd36e9d49450d1c128e4a87e27a /scripts/stackusage
parentfe8933c5b3e2e5294f82da546792268e5687391e (diff)
pinctrl: qcom: Drop redundant intr_target_reg on modern SoCs
On all Qualcomm TLMM generations from APQ8084 onwards, the interrupt target routing bits are located in the same register as the interrupt configuration bits (intr_cfg_reg). Only five older SoCs — APQ8064, IPQ8064, MDM9615, MSM8660 and MSM8960 — have a genuinely separate interrupt target routing register at a different offset (0x400 + 0x4 * id). Replace MSM_ACCESSOR(intr_target) with a custom accessor that falls back to intr_cfg_reg when intr_target_reg is zero. Apply the same fallback in the SCM path. Drop the now-redundant .intr_target_reg initializer from all SoC drivers where it duplicated intr_cfg_reg, keeping it only in the five drivers where it genuinely differs. Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
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