diff options
| author | Luke Wang <ziniu.wang_1@nxp.com> | 2026-03-11 17:50:06 +0800 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2026-03-16 16:08:54 +0100 |
| commit | 5e3486e64094c28a526543f1e8aa0d5964b7f02d (patch) | |
| tree | f6d288a3083cea8abb894df34c8588fec774bf0e /scripts/rt-tester/git@git.tavy.me:linux.git | |
| parent | 2b76e0cc7803e5ab561c875edaba7f6bbd87fbb0 (diff) | |
mmc: sdhci: fix timing selection for 1-bit bus width
When 1-bit bus width is used with HS200/HS400 capabilities set,
mmc_select_hs200() returns 0 without actually switching. This
causes mmc_select_timing() to skip mmc_select_hs(), leaving eMMC
in legacy mode (26MHz) instead of High Speed SDR (52MHz).
Per JEDEC eMMC spec section 5.3.2, 1-bit mode supports High Speed
SDR. Drop incompatible HS200/HS400/UHS/DDR caps early so timing
selection falls through to mmc_select_hs() correctly.
Fixes: f2119df6b764 ("mmc: sd: add support for signal voltage switch procedure")
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'scripts/rt-tester/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions