summaryrefslogtreecommitdiff
path: root/scripts/patch-kernel
diff options
context:
space:
mode:
authorMiquel Raynal <miquel.raynal@bootlin.com>2026-05-26 16:56:49 +0200
committerPratyush Yadav <pratyush@kernel.org>2026-05-27 14:36:03 +0200
commit751e4b02c469ac84e390c472fd30e2c512e3f587 (patch)
treebd83f0279a344b20594e06036aff35f5ffbad55c /scripts/patch-kernel
parent855599425e1aefb499e7bf90c34f708ebbb63045 (diff)
mtd: spi-nor: winbond: Add W25H02NWxxAM CMP locking support
This chip has support for the locking complement (CMP) feature. Add the relevant bit to enable it. Unfortunately, this chip also comes with an incorrect BFPT table, indicating the Control Register cannot be read back. This is wrong, reading back the register works and has no (observed) side effect. The datasheet clearly indicates supporting the 35h command and all bits from the CR are marked readable. QE and CMP bits are inside, and can be properly read back. Add a fixup for this, otherwise it would defeat the use of the CMP feature. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Diffstat (limited to 'scripts/patch-kernel')
0 files changed, 0 insertions, 0 deletions