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authorWolfram Sang <wsa+renesas@sang-engineering.com>2026-04-14 21:48:38 +0200
committerWolfram Sang <wsa+renesas@sang-engineering.com>2026-04-14 21:48:38 +0200
commite336aa3c396ba41fd5a3b818df917a70f39594a5 (patch)
tree4dd684550e1eb1a2827e58f8a89bac556a618319 /scripts/cleanpatch
parent73e65c424867fb9396de6d1265228b75e1ee0718 (diff)
parente43f2df330a1b87c97235e4faade860d15787735 (diff)
Merge tag 'i2c-host-7.1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-mergewindow
i2c-host for v7.1, part 1 - generic cleanups in npcm7xx, qcom-cci, xiic and designware DT bindings - atr: use kzalloc_flex for alias pool allocation - ixp4xx: convert bindings to DT schema - ocores: use read_poll_timeout_atomic() for polling waits - qcom-geni: skip extra TX DMA TRE for single read messages - s3c24xx: validate SMBus block length before using it - spacemit: refactor xfer path and add K1 PIO support - tegra: identify DVC and VI with SoC data variants - tegra: support SoC-specific register offsets - xiic: switch to devres and generic fw properties - xiic: skip input clock setup on non-OF systems rtl9300: - add per-SoC callbacks and clock support for RTL9607C - add support for new 50 kHz and 2.5 MHz bus speeds - general refactoring in preparation for RTL9607C support New support: - DesignWare GOOG5000 (ACPI HID) - Intel Nova Lake (ACPI ID) - Realtek RTL9607C - SpacemiT K3 binding - Tegra410 register layout support
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