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authorFong, Yan Kei <yan.kei.fong@altera.com>2025-09-11 09:58:12 +0800
committerDinh Nguyen <dinguyen@kernel.org>2025-10-14 22:07:56 -0500
commita025e1fb353046c14a948e244cec9f0209464f5e (patch)
tree83bb15bff56cc879fe8792271404a73f037da6d7 /scripts/atomic/git@git.tavy.me:linux.git
parente928e15a3e97714356d6fcdbe7f7772c1c87d58a (diff)
arm64: dts: socfpga: agilex5: Add 4-bit SPI bus width
Add spi-tx-bus-width and spi-rx-bus-width properties with value 4 to the agilex5 device tree. This update configures the SPI controller to use a 4-bit bus width for both transmission and reception, potentially improving SPI throughput and matching the hardware capabilities more closely. Signed-off-by: Fong, Yan Kei <yan.kei.fong@altera.com> Reviewed-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> Reviewed-by: Matthew Gerlach <matthew.gerlach@altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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