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authorChanhong Jung <happycpu@gmail.com>2026-04-29 12:51:33 +0900
committerBartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>2026-05-06 10:08:11 +0200
commitd6e1a94888f5a4306c9998944a0f29f7bcd49411 (patch)
tree48290cc8d35c669d7312b6ff2914d6660943250b /scripts/Makefile.thinlto
parent3a33394e8a5bc10ae4cbe9a35177fef714513e2e (diff)
dt-bindings: gpio: fairchild,74hc595: add lines-initial-states property
The 74HC595 and 74LVC594 shift registers latch their outputs until the first serial write, so boards that depend on a specific power-on pattern (for example active-low indicators, reset lines, or other signals that must come up non-zero) have no way to express that today: the Linux driver always writes zeros from its zero-initialised buffer during probe. Document support for the existing lines-initial-states bitmask, already defined for nxp,pcf8575, so the same convention covers this output-only device. Bit N corresponds to GPIO line N. Because the 74HC595/74LVC594 family is push-pull output only (no input mode, no high-impedance state under software control), bit=0 drives the line low and bit=1 drives it high; this differs from nxp,pcf8575, where the 0/1 polarity reflects the quasi-bidirectional nature of that part. The bitmask covers up to 32 lines, which fits the typical 1-4 chip cascades that appear in tree. Should longer chains require seeding in the future, the property can be extended to a uint32-array without breaking the bit-N-equals-line-N convention. Suggested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Chanhong Jung <happycpu@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20260429035134.1023330-2-happycpu@gmail.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
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