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authorJan-Henrik Bruhn <kernel@jhbruhn.de>2026-05-23 15:36:17 +0200
committerGuenter Roeck <linux@roeck-us.net>2026-06-09 08:23:09 -0700
commit964acc34569677e6725812172c3d1a28b3973277 (patch)
treea48f0469b1348c97b25b7f033592d4561557eb05 /scripts/Makefile.thinlto
parent22c1992642ebe95f4ec9f6456cf56ae330d2571a (diff)
hwmon: (lm63) expose PWM frequency and LUT hysteresis as writable
The driver caches the PWM frequency register and the CONFIG_FAN slow-clock select bit, but never lets userspace pick a different output frequency. Add a pwm1_freq sysfs attribute that selects the closest SCS + PFR combination for the requested value in Hz, gated by manual mode like set_pwm1(). PFR is clamped to 31 so that 2*PFR fits in the chip's 6-bit PWM register (matching the existing scaling assumption in show_pwm1). The hardware LUT hysteresis register is shared by all LUT entries, so the per-point pwm1_auto_pointN_temp_hyst attributes can't be made RW without N-to-1 cross-attribute side effects. Following the max31760 precedent, expose a single chip-wide pwm1_auto_point_temp_hyst attribute holding the hysteresis amount in millidegrees; the per-point attributes stay RO and continue to show the resulting absolute trip-down temperature for each entry. This was tested on a Linksys LGS328MPC switch hardware where the fan would not spin with the default PWM Frequency, which is why this change is required. Signed-off-by: Jan-Henrik Bruhn <kernel@jhbruhn.de> Link: https://lore.kernel.org/r/20260523133617.3439102-1-kernel@jhbruhn.de Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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