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authorMario Limonciello <mario.limonciello@amd.com>2026-07-20 11:28:44 -0500
committerLinus Walleij <linusw@kernel.org>2026-07-25 11:32:03 +0200
commitffe8a0c6b55285ceaf2f42fc20c3a0594d14f1e9 (patch)
treec3adbbf7b10e4e97d2e3f1c5f0808fa6a5d9ba82 /rust/zerocopy-derive/git@git.tavy.me:linux.git
parent25cb6e9a13123d1039cdc75b446ac52e1ebdc26d (diff)
pinctrl-amd: Don't clear S4 wake bits at probe
commit 6bc3462a0f5e ("pinctrl: amd: Mask wake bits on probe again") introduced a regression where Wake-on-LAN no longer works after suspend or shutdown on some AMD platforms. Firmware-programmed S4 wake bits for devices like PCIe NICs using PCI PME are cleared at probe, but nothing restores them. Unlike S0i3/S3 wake sources that use enable_irq_wake() -> amd_gpio_irq_set_wake(), PCIe PME does not use GPIO IRQ infrastructure and relies on firmware configuration. The original intent of commit 6bc3462a0f5e ("pinctrl: amd: Mask wake bits on probe again") was to clear spurious wake bits left by firmware to prevent unwanted wakeups. However, S4 wake bits are used for hardware-level wake sources like WoL that bypass the kernel's IRQ wake API. Fix by preserving S4 wake bits at probe and only clearing S0i3/S3 bits: - Firmware-configured S4 wake sources (WoL) continue working - Kernel maintains control of S3/S0i3 wake policy via set_wake() - S3-only wake sources work correctly per commit f31f33dbb3ba ("pinctrl: amd: Take suspend type into consideration which pins are non-wake") The trade-off is that firmware-programmed spurious S4 wake bits remain set, but this is less problematic than breaking WoL. Fixes: 6bc3462a0f5e ("pinctrl: amd: Mask wake bits on probe again") Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
Diffstat (limited to 'rust/zerocopy-derive/git@git.tavy.me:linux.git')
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