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| author | Michal Camacho Romero <michal.camacho.romero@intel.com> | 2026-01-14 13:16:23 +0100 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2026-01-15 18:17:47 +0100 |
| commit | d6f6bae3ecba665e18a6b6cfcd575f8e9f46b204 (patch) | |
| tree | aa617a65585b4bbbf821e23f4354fd5b78acfce9 /rust/alloc/collections/git@git.tavy.me:linux.git | |
| parent | 0f61b1860cc3f52aef9036d7235ed1f017632193 (diff) | |
ACPICA: Add support for the new ACPI Table: DTPR
Define a new the ACPI Table, structure and registers, related with it, according
to the latest version of the Intel TXT DMA Protection Ranges (TPR) specification
(Revision 0.73):
* DTPR ACPI Table
* TPR Base Register
* TPR Serialize Request Register
* TPR Limit Register
* TPR Instance Structure
* DMAR TXT Protected Reporting Structure
These structures will be used to handle TPRs on the Intel CPU's.
Link: https://github.com/acpica/acpica/commit/10e7a88f70da
Link: https://uefi.org/sites/default/files/resources/633933_Intel_TXT_DMA_Protection_Ranges_rev_0p73.pdf
Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Link: https://patch.msgid.link/6234415.lOV4Wx5bFT@rafael.j.wysocki
Diffstat (limited to 'rust/alloc/collections/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions