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authorJacky Bai <ping.bai@nxp.com>2026-01-23 10:51:26 +0800
committerUlf Hansson <ulf.hansson@linaro.org>2026-01-27 15:19:02 +0100
commitae0a24c5a8dcea20bf8e344eadf6593e6d1959c3 (patch)
tree181636840452dc7258be199659165085798ac304 /rust/alloc/collections/git@git.tavy.me:linux.git
parent8aa6f7697f5981d336cac7af6ddd182a03c6da01 (diff)
pmdomain: imx: gpcv2: Fix the imx8mm gpu hang due to wrong adb400 reset
On i.MX8MM, the GPUMIX, GPU2D, and GPU3D blocks share a common reset domain. Due to this hardware limitation, powering off/on GPU2D or GPU3D also triggers a reset of the GPUMIX domain, including its ADB400 port. However, the ADB400 interface must always be placed into power‑down mode before being reset. Currently the GPUMIX and GPU2D/3D power domains rely on runtime PM to handle dependency ordering. In some corner cases, the GPUMIX power off sequence is skipped, leaving the ADB400 port active when GPU2D/3D reset. This causes the GPUMIX ADB400 port to be reset while still active, leading to unpredictable bus behavior and GPU hangs. To avoid this, refine the power‑domain control logic so that the GPUMIX ADB400 port is explicitly powered down and powered up as part of the GPU power domain on/off sequence. This ensures proper ordering and prevents incorrect ADB400 reset. Suggested-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'rust/alloc/collections/git@git.tavy.me:linux.git')
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