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| author | Cristian Ciocaltea <cristian.ciocaltea@collabora.com> | 2026-01-13 01:20:54 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2026-01-21 14:11:57 +0530 |
| commit | 3481fc04d969bc1528c2d1f7c02443a9fccf1a83 (patch) | |
| tree | 6fa35db93ff1564fd9ac55e6cdc1ec1c203fcd13 /rust/alloc/collections/git@git.tavy.me:linux.git | |
| parent | df74a964e4354e65fefef60c9c50765ff32cd26e (diff) | |
phy: rockchip: samsung-hdptx: Compute clk rate from PLL config
Improve ->recalc_rate() callback of hdptx_phy_clk_ops to calculate the
initial clock rate based on the actual PHY PLL configuration as
retrieved from the related hardware registers.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://patch.msgid.link/20260113-phy-hdptx-frl-v6-7-8d5f97419c0b@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'rust/alloc/collections/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions