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authorJinjie Ruan <ruanjinjie@huawei.com>2026-05-06 13:52:05 -0400
committerYury Norov <ynorov@nvidia.com>2026-05-28 11:39:16 -0400
commite8620bd7e5e07c025a5e317ebc8c7df95dc63712 (patch)
tree8235998de706f1ae0371795350b414dc73d925b4 /include
parent83aede8131afa99b26034f81fe77181eba38b0c2 (diff)
arch/riscv: Add bitrev.h file to support rev8 and brev8
The RISC-V Bit-manipulation Extension for Cryptography (Zbkb) provides the 'brev8' instruction, which reverses the bits within each byte. Combined with the 'rev8' instruction (from Zbb or Zbkb), which reverses the byte order of a register, we can efficiently implement 16-bit, 32-bit, and (on RV64) 64-bit bit reversal. This is significantly faster than the default software table-lookup implementation in lib/bitrev.c, as it replaces memory accesses and multiple arithmetic operations with just two or three hardware instructions. Select HAVE_ARCH_BITREVERSE as well as GENERIC_BITREVERSE, and provide <asm/bitrev.h> to utilize these instructions when the Zbkb extension is available at runtime via the alternatives mechanism. [Yury: select the options conditionally on BITREVERSE] Link: https://docs.riscv.org/reference/isa/unpriv/b-st-ext.html Suggested-by: David Laight <david.laight.linux@gmail.com> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Signed-off-by: Yury Norov <ynorov@nvidia.com>
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