diff options
| author | Shawn Lin <shawn.lin@rock-chips.com> | 2026-03-25 09:58:30 +0800 |
|---|---|---|
| committer | Manivannan Sadhasivam <mani@kernel.org> | 2026-04-07 20:12:16 +0530 |
| commit | d1b7add89c004295cd48d7cd49946ed5cb5cbb55 (patch) | |
| tree | 86535a89eb54d74a41a1420aab8dbcd346d0263e /include | |
| parent | 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f (diff) | |
PCI: trace: Add PCI controller tracepoint feature
Some PCI controllers may provide debug functionalities to track PCI bus
activities like LTSSM state transitions and data rate changes. These will
be very useful for debugging PCI link specific issues such as endpoint not
getting detected or performance issues.
Hence, implement the PCI controller tracepoint feature for recording LTSSM
state transitions and data rate changes.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
[mani: commit log and maintainers entry]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Link: https://patch.msgid.link/1774403912-210670-2-git-send-email-shawn.lin@rock-chips.com
Diffstat (limited to 'include')
| -rw-r--r-- | include/trace/events/pci_controller.h | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/include/trace/events/pci_controller.h b/include/trace/events/pci_controller.h new file mode 100644 index 000000000000..a4b387cf52a6 --- /dev/null +++ b/include/trace/events/pci_controller.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#undef TRACE_SYSTEM +#define TRACE_SYSTEM pci_controller + +#if !defined(_TRACE_HW_EVENT_PCI_CONTROLLER_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_HW_EVENT_PCI_CONTROLLER_H + +#include <uapi/linux/pci_regs.h> +#include <linux/tracepoint.h> + +#define RATE \ + EM(PCIE_SPEED_2_5GT, "2.5 GT/s") \ + EM(PCIE_SPEED_5_0GT, "5.0 GT/s") \ + EM(PCIE_SPEED_8_0GT, "8.0 GT/s") \ + EM(PCIE_SPEED_16_0GT, "16.0 GT/s") \ + EM(PCIE_SPEED_32_0GT, "32.0 GT/s") \ + EM(PCIE_SPEED_64_0GT, "64.0 GT/s") \ + EMe(PCI_SPEED_UNKNOWN, "Unknown") + + +#undef EM +#undef EMe +#define EM(a, b) TRACE_DEFINE_ENUM(a); +#define EMe(a, b) TRACE_DEFINE_ENUM(a); + +RATE + +#undef EM +#undef EMe +#define EM(a, b) {a, b}, +#define EMe(a, b) {a, b} + +TRACE_EVENT(pcie_ltssm_state_transition, + TP_PROTO(const char *dev_name, const char *state, u32 rate), + TP_ARGS(dev_name, state, rate), + + TP_STRUCT__entry( + __string(dev_name, dev_name) + __string(state, state) + __field(u32, rate) + ), + + TP_fast_assign( + __assign_str(dev_name); + __assign_str(state); + __entry->rate = rate; + ), + + TP_printk("dev: %s state: %s rate: %s", + __get_str(dev_name), __get_str(state), + __print_symbolic(__entry->rate, RATE) + ) +); + +#endif /* _TRACE_HW_EVENT_PCI_CONTROLLER_H */ + +/* This part must be outside protection */ +#include <trace/define_trace.h> |