diff options
| author | Dave Jiang <dave.jiang@intel.com> | 2026-07-24 10:09:00 -0700 |
|---|---|---|
| committer | Dave Jiang <dave.jiang@intel.com> | 2026-07-24 10:09:00 -0700 |
| commit | 898f5f4fcd13c2ce3a40256cde2845bbe052f7d0 (patch) | |
| tree | 82605c69ecbfec07dfe4bf140faafa4532ffd928 /include | |
| parent | 1590cf0329716306e948a8fc29f1d3ee87d3989f (diff) | |
| parent | 96ddf1af34f5f9e29891a5bfb7a18dd0a5bab9d6 (diff) | |
Merge branch 'for-7.3/cxl-type2-support' into cxl-for-next
Remaining cxl/core type2 support
cxl: Support dpa without a mailbox
cxl: Support Type2 cxl regs mapping
Diffstat (limited to 'include')
| -rw-r--r-- | include/cxl/cxl.h | 2 | ||||
| -rw-r--r-- | include/cxl/pci.h | 22 |
2 files changed, 24 insertions, 0 deletions
diff --git a/include/cxl/cxl.h b/include/cxl/cxl.h index 016c74fb747c..802b143de83d 100644 --- a/include/cxl/cxl.h +++ b/include/cxl/cxl.h @@ -226,4 +226,6 @@ struct cxl_dev_state *_devm_cxl_dev_state_create(struct device *dev, struct cxl_memdev *devm_cxl_probe_mem(struct cxl_dev_state *cxlds, struct range *range); + +int cxl_set_capacity(struct cxl_dev_state *cxlds, u64 capacity); #endif /* __CXL_CXL_H__ */ diff --git a/include/cxl/pci.h b/include/cxl/pci.h new file mode 100644 index 000000000000..3e0000015871 --- /dev/null +++ b/include/cxl/pci.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright(c) 2020 Intel Corporation. All rights reserved. */ + +#ifndef __CXL_CXL_PCI_H__ +#define __CXL_CXL_PCI_H__ + +/* Register Block Identifier (RBI) */ +enum cxl_regloc_type { + CXL_REGLOC_RBI_EMPTY = 0, + CXL_REGLOC_RBI_COMPONENT, + CXL_REGLOC_RBI_VIRT, + CXL_REGLOC_RBI_MEMDEV, + CXL_REGLOC_RBI_PMU, + CXL_REGLOC_RBI_TYPES +}; + +struct cxl_register_map; +struct pci_dev; + +int cxl_pci_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type, + struct cxl_register_map *map); +#endif |