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| author | Rob Clark <robin.clark@oss.qualcomm.com> | 2026-05-26 07:50:46 -0700 |
|---|---|---|
| committer | Rob Clark <robin.clark@oss.qualcomm.com> | 2026-05-29 07:07:29 -0700 |
| commit | 5ef26a2a4b2e55b07984e17baec179b849b52bcc (patch) | |
| tree | 553e9d9c51af199a0f60f82cadd9e049f1cf062f /include | |
| parent | 5eedc8c2d0b52a44cecbd12641524b3616070c0c (diff) | |
drm/msm/a8xx: Add perfcntr flush sequence
With the slice architecture, we need to flush the slice and unslice
counters to perf RAM before reading counters.
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Reviewed-by: Anna Maniscalco <anna.maniscalco2000@gmail.com>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/728216/
Message-ID: <20260526145137.160554-13-robin.clark@oss.qualcomm.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions