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| author | Andy Yan <andy.yan@rock-chips.com> | 2025-07-18 14:41:13 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2026-01-08 16:42:15 +0100 |
| commit | 9fae82450d8a5f9c8fa016cd15186e975609b2ac (patch) | |
| tree | 4ba5713ff5d28207ac52e25e889f9fd4a84b1d40 /include/uapi/misc/git@git.tavy.me:linux.git | |
| parent | 3ea3b7891b21ce079cfc60dfd476ba59ee625a2b (diff) | |
drm/rockchip: vop2: Add delay between poll registers
According to the implementation of read_poll_timeout_atomic, if the
delay time is 0, it will only use a simple loop based on timeout_us to
decrement the count. Therefore, the final timeout time will differ
significantly from the set timeout time. So, here we set a specific
delay time to ensure that the calculation of the timeout duration
is accurate.
Fixes: 3e89a8c68354 ("drm/rockchip: vop2: Fix the update of LAYER/PORT select registers when there are multi display output on rk3588/rk3568")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20250718064120.8811-1-andyshrk@163.com
Diffstat (limited to 'include/uapi/misc/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions