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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2026-02-13 13:17:42 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-03-06 13:15:02 +0100 |
| commit | f459672cf3ffd3c062973838951418271aa2ceef (patch) | |
| tree | ce582ad2a073c1dd7a52c501c022b323a67d60c8 /include/uapi/linux/wimax/git@git.tavy.me:linux.git | |
| parent | b12985ceca18bcf67f176883175d544daad5e00e (diff) | |
arm64: dts: renesas: r9a09g087: Fix CPG register region sizes
The CPG register regions were incorrectly sized. Update them to match
the actual hardware specification:
- First region (0x80280000): 0x1000 -> 0x10000 (64kiB)
- Second region (0x81280000): 0x9000 -> 0x10000 (64kiB)
Fixes: 4b3d31f0b81fe ("arm64: dts: renesas: Add initial SoC DTSI for the RZ/N2H SoC")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260213131742.3606334-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'include/uapi/linux/wimax/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions