diff options
| author | Mark Brown <broonie@kernel.org> | 2023-07-31 21:08:15 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2023-07-31 21:08:15 +0100 |
| commit | 3dcce5b3ff095628458c9daa2d69bbc7dca6686f (patch) | |
| tree | 225a8cd4dc59d8b8cc7744ffe848076109a559c2 /include/linux | |
| parent | 6c7a864007b66e60a3f64858a9555efed408b048 (diff) | |
| parent | d7f74cc31a89a45d4c7deaa5f759661a07a183d6 (diff) | |
spi-geni-qcom: Add SPI device mode support for GENI
Merge series from Praveen Talari <quic_ptalari@quicinc.com>:
This series adds spi device mode functionality to geni based Qupv3.
The common header file contains spi slave related registers and masks.
Praveen Talari (2):
soc: qcom: geni-se: Add SPI Device mode support for GENI based QuPv3
spi: spi-geni-qcom: Add SPI Device mode support for GENI based QuPv3
---
v6 -> v7:
- Corrected author mail
v5 -> v6:
- Added code comments
- Dropped get_spi_master api
v4 -> v5:
- Addressed review comments in driver
v3 -> v4:
- Used existing property spi-slave
- Hence dropped dt-binding changes
v2 -> v3:
- Modified commit message
- Addressed comment on dt-binding
v1 -> v2:
- Added dt-binding change for spi slave
- Modified commit message
- Addressed review comments in driver
drivers/spi/spi-geni-qcom.c | 53 ++++++++++++++++++++++++++++----
include/linux/soc/qcom/geni-se.h | 9 ++++++
2 files changed, 56 insertions(+), 6 deletions(-)
--
2.17.1
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/soc/qcom/geni-se.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/linux/soc/qcom/geni-se.h b/include/linux/soc/qcom/geni-se.h index 821a19135bb6..29e06905bc1f 100644 --- a/include/linux/soc/qcom/geni-se.h +++ b/include/linux/soc/qcom/geni-se.h @@ -35,6 +35,7 @@ enum geni_se_protocol_type { GENI_SE_UART, GENI_SE_I2C, GENI_SE_I3C, + GENI_SE_SPI_SLAVE, }; struct geni_wrapper; @@ -73,12 +74,14 @@ struct geni_se { /* Common SE registers */ #define GENI_FORCE_DEFAULT_REG 0x20 +#define GENI_OUTPUT_CTRL 0x24 #define SE_GENI_STATUS 0x40 #define GENI_SER_M_CLK_CFG 0x48 #define GENI_SER_S_CLK_CFG 0x4c #define GENI_IF_DISABLE_RO 0x64 #define GENI_FW_REVISION_RO 0x68 #define SE_GENI_CLK_SEL 0x7c +#define SE_GENI_CFG_SEQ_START 0x84 #define SE_GENI_DMA_MODE_EN 0x258 #define SE_GENI_M_CMD0 0x600 #define SE_GENI_M_CMD_CTRL_REG 0x604 @@ -111,6 +114,9 @@ struct geni_se { /* GENI_FORCE_DEFAULT_REG fields */ #define FORCE_DEFAULT BIT(0) +/* GENI_OUTPUT_CTRL fields */ +#define GENI_IO_MUX_0_EN BIT(0) + /* GENI_STATUS fields */ #define M_GENI_CMD_ACTIVE BIT(0) #define S_GENI_CMD_ACTIVE BIT(12) @@ -130,6 +136,9 @@ struct geni_se { /* GENI_CLK_SEL fields */ #define CLK_SEL_MSK GENMASK(2, 0) +/* SE_GENI_CFG_SEQ_START fields */ +#define START_TRIGGER BIT(0) + /* SE_GENI_DMA_MODE_EN */ #define GENI_DMA_MODE_EN BIT(0) |