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authorVille Syrjälä <ville.syrjala@linux.intel.com>2026-04-09 13:15:35 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2026-04-13 21:14:02 +0300
commitdfe1879a88d8ca5f1ec69928035d62fb564702fd (patch)
tree5790657f12a99716a91099ee1cf0941b53d48313 /include/linux/timerqueue_types.h
parentd1c90599185b8e14a4c5bcc338bade2f41ac4891 (diff)
drm/i915/dp: Validate "4:2:0 also" modes twice
Currently we only validate "4:2:0 also" modes as RGB. But if that fails we could perhaps still use the mode in with 4:2:0 output. All we have to do is retry the validation with the different sink format. So far we did the double validation only so far as it affects PCON TMDS clock limits. But validating everything twice seems a bit more sane. Note that intel_dp_output_format() might still end up picking RGB for the actual output format (and letting PCON deal with the YCbCr conversion). So I suppose we could still fail the validation due to that, and forcing even the output format to 4:2:0 might solve it on a third try. But we'd need the same fallback logic in intel_dp_compute_config(). For now this seems sufficient. v2: Pass output_format to intel_dp_mode_min_link_bpp_x16() Add TODO about remaining issues Nuke intel_dp_sink_format() Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260409101539.22032-6-ville.syrjala@linux.intel.com Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Diffstat (limited to 'include/linux/timerqueue_types.h')
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