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authorSukhdeep Singh <sukhdeeps@marvell.com>2026-06-10 17:24:45 +0530
committerJakub Kicinski <kuba@kernel.org>2026-06-15 15:38:44 -0700
commitf4f2bfe2b2eaab42a598e1f65b6d42db44e3b0ca (patch)
treee63d011af5bfc9af6ecb1645707b409ae5f0586d /include/linux/timerqueue.h
parent5e7c8f8e96b4b352ccf168e06df46aa40ee0b715 (diff)
net: atlantic: extend hw_ops and TX descriptor for AQC113 PTP
Extend the aq_hw_ops interface with new function pointers required for PTP support on AQC113: - enable_ptp: enable/disable PTP counter with clock selection - hw_ring_tx_ptp_get_ts: read TX timestamp from descriptor writeback - hw_tx_ptp_ring_init/hw_rx_ptp_ring_init: per-ring PTP initialization - hw_get_clk_sel: query active TSG clock selection Update existing hw_ops signatures to support AQC113 dual-clock architecture: - hw_gpio_pulse: add clk_sel and hightime parameters - hw_extts_gpio_enable: add channel parameter Add PTP-related hardware defines: - AQ_HW_TXD_CTL_TS_EN/TS_TSG0 for TX descriptor timestamp control - AQ2_HW_PTP_COUNTER_HZ for AQC113 TSG clock frequency - AQ_HW_PTP_IRQS for PTP interrupt vector accounting - PTP enable flags (L2/L4) and TSG clock selection constants Add request_ts and clk_sel bitfields to aq_ring_buff_s for per-packet TX timestamp request tracking. Update hw_atl_b0.c (AQC107) implementations: - Adapt gpio_pulse and extts_gpio_enable to new signatures - Add TX descriptor timestamp bits for AQC113 when ANTIGUA chip feature is detected Signed-off-by: Sukhdeep Singh <sukhdeeps@marvell.com> Link: https://patch.msgid.link/20260610115448.272-10-sukhdeeps@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions