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| author | Anand Moon <linux.amoon@gmail.com> | 2026-02-19 16:05:46 +0530 |
|---|---|---|
| committer | Neil Armstrong <neil.armstrong@linaro.org> | 2026-04-21 15:46:22 +0200 |
| commit | 918273be0885362a9a00615b46e03f15f8b55667 (patch) | |
| tree | 915740fea7d362f60c2f2a1f10e999f7d0b984a6 /include/linux/timerqueue.h | |
| parent | 28e4a49a28b339b3d14564dd763d109799782687 (diff) | |
arm64: dts: amlogic: meson-axg: Add missing cache information to cpu0
Add missing L1 data and instruction cache parameters to the CPU node 0
for the Cortex-A53 caches on the Meson AXG SoC.
Fixes: 3b6ad2a43367 ("arm64: dts: amlogic: Add cache information to the Amlogic AXG SoCS")
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Link: https://patch.msgid.link/20260219103548.18392-1-linux.amoon@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions