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authorSascha Bischoff <Sascha.Bischoff@arm.com>2026-08-11 15:11:48 +0000
committerOliver Upton <oupton@kernel.org>2026-08-19 12:23:01 -0700
commit302f94dc3f8c21c97d5e91a61a8987810803be6f (patch)
tree1ee4079322107562878bfabb9cc10e27208d8f1e /include/linux/timerqueue.h
parent2962174fdfa63e272082ea7ae989a8fdef29bd0e (diff)
KVM: arm64: Validate GICv5 timer PPIs before claiming ownership
With GICv5, timer PPIs use architecturally defined IDs, and therefore we require userspace to use the architected IDs too. We perform this validation in timer_irqs_are_valid(), which validates the configured PPI after claiming it with kvm_vgic_set_owner(). This is obviously the wrong order, and could both result in a NULL pointer dereference for an ID >= 64 and in an incorrect ownership claim. Switch the order to first validate the PPI before setting the owner. This both prevents an invalid GICv5 timer PPI from reaching the IRQ lookup, and avoids claiming an IRQ for a timer configuration that will be rejected. Fixes: 06c85b58e0b1 ("KVM: arm64: Move GICv5 timer PPI validation into timer_irqs_are_valid()") Link: https://sashiko.dev/#/message/20260810111614.DDC731F000E9%40smtp.kernel.org Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Joey Gouly <joey.gouly@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://patch.msgid.link/20260811150941.941295-5-sascha.bischoff@arm.com Signed-off-by: Oliver Upton <oupton@kernel.org>
Diffstat (limited to 'include/linux/timerqueue.h')
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