drm/amd/display: Fix assertion due to disable/enable CM blocks

[why]
Some dc state transitions can result in CM blocks being disabled, then
re-enabled.  The disable will set a defer bit, but re-enable will not
clear it.  When optimizing later, an assert will be hit due to incorrect
expected HW state.

[how]
Clear defer bits if the block is re-enabled before optimization is
executed.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Aric Cyr <Aric.Cyr@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

0 files changed, 0 insertions, 0 deletions