diff options
| author | Gustavo Sousa <gustavo.sousa@intel.com> | 2025-11-05 11:06:57 -0300 |
|---|---|---|
| committer | Gustavo Sousa <gustavo.sousa@intel.com> | 2025-11-06 18:22:50 -0300 |
| commit | af28e607fc754a2c5ef9ce72e0045b6952b4f3ad (patch) | |
| tree | aa1d9aaa82d832fee418fc154351796a7a6f3735 /include/linux/platform_data/git@git.tavy.me:linux.git | |
| parent | 2d608ce6e6597c37a78e7f98c160ac1a27941774 (diff) | |
drm/i915/xe3p_lpd: Add CDCLK table
Add CDCLK table for Xe3p_LPD.
Just as with Xe3_LPD, we don't need to send voltage index info in the
PMDemand message, so we are able to re-use xe3lpd_cdclk_funcs.
With the new CDCLK table, we also need to update the maximum CDCLK value
returned by intel_update_max_cdclk().
Bspec: 68861, 68863
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20251103-xe3p_lpd-basic-enabling-v3-8-00e87b510ae7@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Diffstat (limited to 'include/linux/platform_data/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions