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authorJason Gunthorpe <jgg@nvidia.com>2026-01-15 10:23:29 -0800
committerWill Deacon <will@kernel.org>2026-01-23 13:47:49 +0000
commitf3c1d372dbb8e5a86923f20db66deabef42bfc9d (patch)
tree6c3f83081ef29895fde16a115ea2eaf74e21aaf9 /include/linux/i2c/git@git.tavy.me:linux.git
parent2781f2a930abb5d27f80b8afbabfa19684833b65 (diff)
iommu/arm-smmu-v3: Mark STE MEV safe when computing the update sequence
Nested CD tables set the MEV bit to try to reduce multi-fault spamming on the hypervisor. Since MEV is in STE word 1 this causes a breaking update sequence that is not required and impacts real workloads. For the purposes of STE updates the value of MEV doesn't matter, if it is set/cleared early or late it just results in a change to the fault reports that must be supported by the kernel anyhow. The spec says: Note: Software must expect, and be able to deal with, coalesced fault records even when MEV == 0. So mark STE MEV safe when computing the update sequence, to avoid creating a breaking update. Fixes: da0c56520e88 ("iommu/arm-smmu-v3: Set MEV bit in nested STE for DoS mitigations") Cc: stable@vger.kernel.org Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com> Reviewed-by: Mostafa Saleh <smostafa@google.com> Reviewed-by: Pranjal Shrivastava <praan@google.com> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com> Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'include/linux/i2c/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions