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authorStafford Horne <shorne@gmail.com>2025-12-10 17:08:27 +0000
committerStafford Horne <shorne@gmail.com>2026-01-16 16:38:56 +0000
commiteea1a28f93c8c78b961aca2012dedfd5c528fcac (patch)
tree73032dfac1cb6eead58bce74cc462df9018af17c /include/linux/i2c/git@git.tavy.me:linux.git
parent111005cafb53efdaf00436bc678f5372a7e06c55 (diff)
openrisc: Fix IPIs on simple multicore systems
Commit c05671846451 ("openrisc: sleep instead of spin on secondary wait") fixed OpenRISC SMP Linux for QEMU. However, stability was never achieved on FPGA development boards. This is because the above patch has a step to unmask IPIs on non-boot cpu's but on hardware without power management, IPIs remain masked. This meant that IPI's were never actually working on the simple SMP systems we run on development boards. The systems booted but stability was very suspect. Add the ability to unmask IPI's on the non-boot cores. This is done by making the OMPIC IRQs proper percpu IRQs. We can then use the enabled_percpu_irq() to unmask IRQ on the non-boot cpus. Update the or1k PIC driver to use a flow handler that can switch between percpu and the configured level or edge flow handlers at runtime. This mechanism is inspired by that done in the J-Core AIC driver. Signed-off-by: Stafford Horne <shorne@gmail.com> Acked-by: Thomas Gleixner <tglx@kernel.org>
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