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authorAlex Deucher <alexander.deucher@amd.com>2025-12-18 15:04:33 -0500
committerAlex Deucher <alexander.deucher@amd.com>2026-01-05 16:59:59 -0500
commit9596097be4bac5297acbbdb5f7c4ff2f4e42502e (patch)
treeb7019fcf853bdedcd34d5dbb7581d450586f9257 /include/linux/i2c/git@git.tavy.me:linux.git
parentc8cf9ddc549fb93cb5a35f3fe23487b1e6707e74 (diff)
drm/amdgpu/gfx9: rework pipeline sync packet sequence
Replace WAIT_REG_MEM with EVENT_WRITE flushes for all shader types and ACQUIRE_MEM. That should accomplish the same thing and avoid having to wait on a fence preventing any issues with pipeline syncs during queue resets. Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/linux/i2c/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions