diff options
| author | Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com> | 2026-01-22 16:13:37 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-01-28 20:41:27 +0000 |
| commit | 590f2430733f1302a78ac405370b8f01038adbf5 (patch) | |
| tree | d5c882cf00fddb341ce88564e2013b2bfced9e80 /include/linux/i2c/git@git.tavy.me:linux.git | |
| parent | ae62e7cf6ab52cebc83feb0bcb374082eaabbf5e (diff) | |
spi: cadence-qspi: Make sure write protection is disabled
Renesas RZ/N1 QSPI controllers embed the Cadence IP with some
modifications. For instance, they feature a write protection of the
direct mapping at the controller level, with this feature all data
writes to the AHB region are aborted.
Despite the fact that the flag setting write protection is disabled by
default, Bootloaders may (and actually do) set it, so mark this feature
as being available with a specific flag to, if applicable, make sure it
is disabled.
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>
Tested-by: Santhosh Kumar K <s-k6@ti.com>
Link: https://patch.msgid.link/20260122-schneider-6-19-rc1-qspi-v4-12-f9c21419a3e6@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/linux/i2c/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions