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authorTroy Mitchell <troy.mitchell@linux.spacemit.com>2026-01-08 14:42:40 +0800
committerYixun Lan <dlan@kernel.org>2026-01-20 22:41:08 +0800
commit4083d8d6c0aa445fc440d70a5258351c47547ee2 (patch)
treea6a5f60a9a1a3fbced45c995599f4bb62df743b3 /include/linux/i2c/git@git.tavy.me:linux.git
parent7a61318049861b777f098d7148d892d7dc79b010 (diff)
riscv: dts: spacemit: pinctrl: update register and IO power
Change the size of the reg register to 0x1000 to match the hardware. This register range covers the IO power domain's register addresses. The IO power domain registers are protected. In order to access the protected IO power domain registers, a valid unlock sequence must be performed by writing the required keys to the AIB Secure Access Register (ASAR). The ASAR register resides within the APBC register address space. A corresponding syscon property `spacemit,apbc` is added to allow the pinctrl driver to access this register. Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Acked-by: Linus Walleij <linusw@kernel.org> Link: https://lore.kernel.org/r/20260108-kx-pinctrl-aib-io-pwr-domain-v2-3-6bcb46146e53@linux.spacemit.com Signed-off-by: Yixun Lan <dlan@kernel.org>
Diffstat (limited to 'include/linux/i2c/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions