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| author | Jay Cornwall <jay.cornwall@amd.com> | 2025-10-23 15:28:39 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-01-05 16:59:56 -0500 |
| commit | 1005ab86cf75aec3462c1c58d6efa87871f2843f (patch) | |
| tree | d69a08663a026b35ebb121e5a70958e0cbe8e355 /include/linux/i2c/git@git.tavy.me:linux.git | |
| parent | 864a8b2c1ff9e5767d6bb19854a671c30b3b268f (diff) | |
drm/amdkfd: Fix VGPR bank state save in gfx12.1 trap handler
S_SETREG_IMM32_B32 does not apply a mask to the MODE bank bits.
SRC2 is consequently unconditonally cleared during context save.
Use S_SETREG_B32 instead to preserve SRC2.
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com>
Reviewed-by: Lancelot Six <lancelot.six@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/linux/i2c/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions