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| author | Jamie Gibbons <jamie.gibbons@microchip.com> | 2026-03-26 17:02:34 +0000 |
|---|---|---|
| committer | Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> | 2026-03-30 10:22:33 +0200 |
| commit | 6b5ef8c88854b343b733b574ea8754c9dab61f41 (patch) | |
| tree | fccdc1956dbbd61c2ce3a93271940c8274a5c932 /fs/devfs/git@git.tavy.me:linux.git | |
| parent | 310a4a9cbb17037668ea440f6a3964d00705b400 (diff) | |
dt-bindings: gpio: fix microchip #interrupt-cells
The GPIO controller on PolarFire SoC supports more than one type of
interrupt and needs two interrupt cells.
Fixes: 735806d8a68e9 ("dt-bindings: gpio: add bindings for microchip mpfs gpio")
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260326-wise-gumdrop-49217723a72a@spud
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Diffstat (limited to 'fs/devfs/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions